Wiki¶
I’ve summarized Mike’s Electric Stuff blog pages here.
In a nutshell, the iPod nano generation 6 has a nice little LCD that is inexpensive and easy to find on eBay for under $10. The downside to this display is that it uses a complex and difficult to generate protocol called MIPI. I’ve developed a small breakout board and will be developing freely available VHDL code which can generate the necessary waveforms and commands to drive these displays.
Breakout Board¶
The first iteration of the breakout board has been sent out for manufacture. I can’t recommend Hackvana enough, Mitch does an A+ job and is a pleasure to work with. The schematic and layout are available for anyone to use under a Creative Commons BY-NC-SA license. What this means is that for as long as you’re not using these files to try to make money, you’re free to do with them as you please, so long as you give appropriate credit to the source of these files. I use Cadsoft Eagle for schematic entry and layout. Free versions are available for Linux, OSX and Windows.
On to the boards:
The board is pretty simple. I have simply taken a note from Mike’s notes on how he developed the Lattice driver circuit and adapted it for a more generic use case. The board also generates the 1.8V core and 5V backlight supplies, and brings everything out to a standard 2.54mm/0.100” 2x8 header.
J1 Pinout¶
| Pin | Name | Description |
| 1 | +3.3V Supply | |
| 2 | GND | |
| 3 | DATLOW | When high, brings both MIPI data signals to logic 0 |
| 4 | MIPI D- | |
| 5 | CLKLOW | When high, brings both MIPI clock signals to logic 0 |
| 6 | MIPI D+ | |
| 7 | 3.3VEN | When LOW, enables 3.3V to the LCD |
| 8 | GND | |
| 9 | 1.8VEN | When high, enables the 1.8V regulator |
| 10 | MIPI CLK- | |
| 11 | BL | When high, enables the LCD backlight supply |
| 12 | MIPI CLK+ | |
| 13 | VSYNC# | Output from LCD to indicate vertical sync period |
| 14 | RST# | When low, holds the LCD in reset |
| 15 | +3.3V Supply | |
| 16 | GND |
The BL and RST# signals do not have any pull-up or pull-down resistors in this version of the board. You must drive them at the appropriate level at all times. Also make note that the 3.3VEN signal is active-low. I don’t know why I did that but I’ve logged issue #471 to address it. The MIPI clock and data pairs should be carried on twisted pair wire and be kept as short as possible.
